Taxonomy of Open Source Processors

Processor Architecture FPU OS MMU HW Multi-threaded Multi/Many-core/GPU Prototype Core Count NoC HDL Back-end Scripts License
BERI64b MIPS/CHERIYYYY (BERI2)MulticoreFPGA/4NBluespecNBERI HW-SW
openMSP43016b MSP430NY (RTOS)NNSMPFPGA/2, ASIC/3NVerilogY (Synth.)BSD
RISC-V Boom64b RISC-VYYYNManycoreFPGA/1YChiselYBSD 3-Clause
RISC-V Rocket64b RISC-VYYYNManycoreASIC/2YChiselYBSD 3-Clause
OpenPiton64b SPARC V9YYYYManycoreFPGA/4, ASIC/25YVerilogYBSD 3-Clause & GPL v2
MIAOW GPGPUAMD Southern IslandsYNNYGPUFPGA/1YVerilogNBSD 3-Clause & GPL v2
ZPU32b MIPSNYNNNo-NVHDLNFreeBSD & GPL
LatticeMico3232b LatticeMico32NYNNNo-NVerilogNGPL
LEON 332b SPARC V8Y ($)YYNSMP/AMP-NVHDLNGPL
CPU8616b x86NYNNNo-NVHDLNGPL
OpenSPARC T1/T264b SPARC V9YYYYMulticoreASIC/8NVerilogNGPL v2
pAVR8b AVRNNNNNo-NVHDLNGPL v2
Simply RISC S164b SPARC V9YYYNNo-NVerilogNGPL v2
SecretBlaze32b MicroBlazeNNNNNo-NVHDLNGPL v3
Zet16b x86NYNNNo-NVerilogNGPL v3
OpenScale32b MicroBlazeNY (RTOS)NNManycoreFPGA/6YVHDLNGPL v3
OpenRISC32b/64b ORBISYYYNNo-NVerilogNLGPL
Amber32b ARM v2aNYNNNo-NVerilogNLGPL
MIPS32 r132b MIPS32 r1NYNYNo-NVerilogNLGPL v3
aeMB32b MicroBlazeNYNYNo-NVerilogNLGPL v3
AltOr3232b ORBISNYNNNo-NVerilogNLGPL v3
XUM32b MIPS32 r2NYNYManycoreFPGA/8YVerilogNLGPL v3
Zeroriscy32b RISC-VNY (RTOS)NNManycoreFPGA/1, ASIC/1NSysVerilogNSolderpad
PULP-RI5CY32b RISC-VYY (RTOS)NNManycoreFPGA/64, ASIC/9NSysVerilogNSolderpad
Ariane64b RISC-VNYNNManycoreFPGA/1, ASIC/1NSysVerilogNSolderpad


This table is created by Mohammad Shahrad and was originally reflected in this paper. Due to interest from the community, he made an online version of this table to update and modify exsiting as well as new open source platforms. Please let him know of any updates.

A Relevant Link:
Stanford CPU DB

Acknowledgments:
Jonathan Balkind, Alexey Lavrov, Davide Rossi, Christopher Celio, Olivier Girard, Colin Schmidt, and Frank K. G├╝rkaynak